MIX Instruction Set - Core Data and Control Operations

Key Insight

MIX instructions are structured with an address (±AA), an index specification (I), a modification/field byte (F), and an operation code (C). The F-byte can define partial fields (L:R), where L is the left-hand part and R is the right-hand part of the field, such as (0:5) for a whole word or (4:4) for the fourth byte, represented numerically as 8L + R. Indexing modifies the effective address M by algebraically adding the contents of an I-register (if I is 1-6) to ±AA. Loading operations like LDA (load A, C=8) and LDi (load i, C=8+i), along with their negative variants, replace register contents with a specified field from memory, shifting the field to the right-hand part of the register, while storing operations like STA (store A, C=24) and STi (store i, C=24+i) move bytes from the right-hand portion of the register to a specified memory field, preserving other parts of the memory word.

Arithmetic operators, including ADD (C=1), SUB (C=2), MUL (C=3), and DIV (C=4), typically operate on the standard (0:5) field. ADD and SUB perform addition/subtraction on rA with a value V from memory, setting the overflow toggle if the result's magnitude exceeds rA's capacity. MUL computes a 10-byte product of V and rA, storing it across rA and rX. DIV divides the 10-byte value of rAX by V, placing the quotient in rA and the remainder in rX, setting the overflow toggle if V is zero or the quotient exceeds five bytes. Address transfer operators like ENTA (enter A, C=48, F=2) and INCA (increase A, C=48, F=0), alongside their X-register and I-register variants (ENTX, INCX, ENTi, INCi), directly load or add/subtract the instruction's address M to a register, with the F-field distinguishing different operations that share the same operation code.

Comparison operators, such as CMPA (compare A, C=56) and CMPi (compare i, C=56+i), compare a specified field of a register with the same field of a memory word, setting the comparison indicator to LESS, EQUAL, or GREATER; if the field excludes the sign, values are treated as nonnegative, and minus zero equals plus zero. Jump operators facilitate program flow alteration: JMP (C=39, F=0) is an unconditional jump to address M, while conditional jumps like JOV (jump on overflow, C=39, F=2) and JGE (jump on greater or equal, C=39, F=7) execute based on the overflow toggle or comparison indicator. Register-specific conditional jumps like JAN (jump A negative, C=40, F=0) check the content of rA, rX, or an I-register, and the J-register stores the return address for most jumps, allowing for structured subroutine calls.