Cover of Code by Charles Petzold - Business and Economics Book

From "Code"

Author: Charles Petzold
Publisher: Microsoft Press
Year: 2000
Category: Computers

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Chapter 13: But What About Subtraction?
Key Insight 2 from this chapter

Binary Two's Complement and Adder/Subtractor Hardware

Key Insight

Representing negative numbers using only binary 0s and 1s, without a dedicated negative sign, requires complement systems with a fixed number of digits and a defined range. In the 'ten's complement' system for decimal numbers, for example, a three-digit range of -500 to 499 (1000 numbers) assigns 000-499 to positive values and 500-999 to negative values, where 500 signifies -500, and 999 signifies -1. A negative number like -255 is converted to its ten's complement by subtracting it from 999 and adding 1, resulting in 745. This method transforms subtraction operations into additions, where subtracting a number is equivalent to adding its complement.

The binary equivalent, 'two's complement', is crucial for computing systems with fixed-bit numbers, such as 8-bit integers, which can represent values from -128 to 127. In this system, the most significant (leftmost) bit functions as a sign bit: 0 for positive numbers and 1 for negative numbers. To calculate a number's two's complement, its ones' complement (all bits inverted) is first obtained, and then 1 is added. For instance, -125 (decimal) is represented by inverting 01111101 (125) to 10000010 and adding 1, yielding 10000011. This representation enables direct addition of positive and negative numbers. However, 'overflow' or 'underflow' conditions must be monitored; these occur if the operands have the same sign bit, but the result's sign bit is different, indicating the result falls outside the representable range.

An existing 8-bit adder can be adapted to perform both addition and subtraction. This modification involves adding an 'Add/Subtract' switch and an 'Overflow/Underflow' lamp. A key component is a 'Ones' Complement' circuit, built from eight XOR gates, which selectively inverts the subtrahend's (B inputs) bits only when the 'Add/Subtract' switch is set for subtraction (Invert signal is 1). During subtraction, the adder's 'Carry In' (CI) input is also set to 1. An XOR gate combines the 'Add/Subtract' signal and the adder's 'Carry Out' (CO) to illuminate the 'Overflow/Underflow' lamp, signaling when results exceed the maximum positive value (e.g., 255 for unsigned addition) or fall below zero (e.g., when the subtrahend is greater than the minuend in subtraction).

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