Expanding Data Handling: Multibyte Operations and Instruction Format Evolution

Key Insight

The initial 8-bit data width posed a significant limitation. While a hardware-intensive solution of connecting multiple 8-bit adders existed for 16-bit operations, a more cost-effective approach was developed. This involved saving the 'Carry Out' bit from the 8-bit adder during the addition of low-order bytes in a 1-bit 'Carry latch'. This latched carry is then utilized as the 'Carry Input' for the subsequent addition of high-order bytes, enabling correct 16-bit arithmetic.

This advancement introduced new operation codes: 'Add with Carry' (22h) and 'Subtract with Borrow' (23h), complementing the existing 'Load' (10h), 'Store' (11h), 'Add' (20h), 'Subtract' (21h), and 'Halt' (FFh). The 'Add with Carry' instruction leverages the Carry latch's output as the adder's carry input, facilitating accurate multibyte additions for values such as 16-bit, 24-bit, or 32-bit numbers. Similarly, 'Subtract with Borrow' utilizes the Carry latch to propagate borrows across byte boundaries during multibyte subtractions.

A fundamental architectural change transformed most instructions (excluding 'Halt') into a 3-byte format: one byte for the opcode followed by two bytes for a 16-bit memory address. This allowed instructions to directly reference specific data locations, promoting flexible data storage and the reuse of computational results. Consequently, a single 64-KB RAM array could store both code and data, using a 2-to-1 selector to switch between the program counter's address and the latched instruction's address. However, this increased versatility reduced the machine's processing speed to one-fourth of its original rate due to longer instruction fetch cycles.